rv32i simulator

RISC-V RV32I Simulator in Python It can be able to emulate 47 base instructions, 32 registers & memory. Perfect for students, developers & researchers. A lightweight, pure-Python RISC-V RV32I Instruction Set Simulator (ISS). Accurately emulates the complete 32-bit base integer ISA with 32 registers, full memory model, and step-through debugging. Supports RISC-V assembly parsing, disassembly, and execution tracing. No dependencies, highly readable code – the best tool to learn computer architecture and test RISC-V programs without hardware.